ar71xx: Fix header offset for newer WRT160NL models
authorGabor Juhos <juhosg@openwrt.org>
Tue, 31 May 2011 22:53:20 +0000 (22:53 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Tue, 31 May 2011 22:53:20 +0000 (22:53 +0000)
commit6f14177314085502d798a9c79b60623350d338dd
tree4343d4bc8707ff8bd4cd33dcd423dc27e47fd010
parente7a7ee1db170f1954bf1a3e99f66ce3aded7b3b0
ar71xx: Fix header offset for newer WRT160NL models

Newer WRT160NLs have a flash chip with 4K erase blocks instead of 64K,
resulting in miscalculated partition sizes.
Since the actual sizes did not change, hardcode them to their current
sizes, and make sure they are at least one erase block big (in case Cisco
decides to start to use chips with 128K erase blocks).

Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27049 3c298f89-4303-0410-b956-a3cf2f4a3e73
target/linux/ar71xx/files/drivers/mtd/wrt160nl_part.c