ar71xx: use correct fractional dividers for {CPU,DDR}_PLL on QCA955x
authorGabor Juhos <juhosg@openwrt.org>
Mon, 10 Sep 2012 14:38:01 +0000 (14:38 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Mon, 10 Sep 2012 14:38:01 +0000 (14:38 +0000)
commit888f24c4a41a4907bafc4bf108341b22201ad304
treeda66bb7eb6bf89f8478bf887520747c84b08c1a8
parent9f2bbfb4236a3e11daeb722ad906ed00810d2d59
ar71xx: use correct fractional dividers for {CPU,DDR}_PLL on QCA955x

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33362 3c298f89-4303-0410-b956-a3cf2f4a3e73
target/linux/ar71xx/patches-3.3/162-MIPS-ath79-add-clock-setup-for-the-QCA955X-SoCs.patch