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[cns3xxx]: clean up PCI bus topology
author
Imre Kaloz
<kaloz@openwrt.org>
Thu, 10 Jan 2013 13:23:33 +0000
(13:23 +0000)
committer
Imre Kaloz
<kaloz@openwrt.org>
Thu, 10 Jan 2013 13:23:33 +0000
(13:23 +0000)
This makes the PCI bus topology more standard for devices behind a bridge
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35078
3c298f89
-4303-0410-b956-
a3cf2f4a3e73
target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c
patch
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diff --git
a/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c
b/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c
index
8fccbbf
..
4f5d500
100644
(file)
--- a/
target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c
+++ b/
target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c
@@
-59,9
+59,9
@@
__set_direction(struct cns3xxx_gpio_chip *cchip, unsigned pin, int input)
reg = __raw_readl(cchip->base + GPIO_DIR);
if (input)
- reg
|= 1 << pin
;
+ reg
&= ~(1 << pin)
;
else
- reg
&= !
(1 << pin);
+ reg
|=
(1 << pin);
__raw_writel(reg, cchip->base + GPIO_DIR);
}