[kernel] Add support for GigaDevice GD25Q32/GD25Q64 SPI Flash in m25p80.c

Add support for GigaDevice GD25Q32 32 Mbit (4 MB) SPI Flash (see datasheet: http://www.gigadevice.com/UserFiles/GD25Q32_Rev0.2(1).pdf) used in Hame MPR-A1 and clones and for GigaDevice GD25Q64 64 Mbit (8 MB) SPI Flash used in Hame MPR-A2 devices (datasheet: http://www.gigadevice.com/UserFiles/GD25Q64.pdf).

Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
Patchwork: http://patchwork.openwrt.org/patch/3120/

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35361 3c298f89-4303-0410-b956-a3cf2f4a3e73

diff --git a/linux/generic/patches-3.6/479-mtd_mp25p80_add_gd25q32_gd25q64.patch b/linux/generic/patches-3.6/479-mtd_mp25p80_add_gd25q32_gd25q64.patch
new file mode 100644 (file)
index 0000000..ddc27b1
--- /dev/null
+++ b/linux/generic/patches-3.6/479-mtd_mp25p80_add_gd25q32_gd25q64.patch
@@ -0,0 +1,13 @@
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -651,6 +651,10 @@
+       /* Everspin */
+       { "mr25h256", CAT25_INFO(  32 * 1024, 1, 256, 2) },
+ 
++      /* GigaDevice */
++      { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
++      { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
++
+       /* Intel/Numonyx -- xxxs33b */
+       { "160s33b",  INFO(0x898911, 0, 64 * 1024,  32, 0) },
+       { "320s33b",  INFO(0x898912, 0, 64 * 1024,  64, 0) },